1. Field of the Invention
The present invention generally relates to a method for forming a semiconductor device.
Priority is claimed on Japanese Patent Application No. 2010-236488, filed Oct. 21, 2010, the content of which is incorporated herein by reference.
2. Description of the Related Art
Japanese Unexamined Patent Application, First Publication, No. JP-A-2002-009174 discloses a semiconductor device which has a memory cell region, such as a DRAM. Japanese Unexamined Patent Application, First Publications, Nos. JP-A-2002-009174 also discloses a technique in which storage elements (for example, capacitors) disposed in the memory cell region and MOS transistors used for selecting are connected via a plurality of contact plugs.
With advances in the microstructuring of semiconductor devices, because the size of contact plugs disposed in the memory cell region has also been shrinking, the operational characteristics tend to be influenced by an increase in the electrical resistance value. If the contact plugs that are disposed in the memory cell region and directly connected to the semiconductor substrate are formed from metal, there has been concern with a worsening of storage operation characteristics, caused by the influence of an increase in the junction leakage current or the like.
Given this, Japanese Unexamined Patent Application, First Publications, Nos. JP-A-2002-299571 and JP-A-2009-200255 disclose that plugs that use metal for parts that are not directly connected to a semiconductor substrate are formed, thereby suppressing an increase in the electrical resistance value.